AppleIntelInfo.kext v1.4 Copyright © 2012-2015 Pike R. Alpha. All rights reserved
Settings:
------------------------------------
logMSRs............................: 1
logIGPU............................: 1
logIntelRegs.......................: 1
logCStates.........................: 1
logIPGStyle........................: 1
InitialTSC.........................: 0x655defc52b
MWAIT C-States.....................: 135456
Model Specific Regiters
------------------------------------
MSR_CORE_THREAD_COUNT......(0x35) : 0x20004
MSR_PLATFORM_INFO..........(0xCE) : 0x80C10F0011D00
MSR_PMG_CST_CONFIG_CONTROL.(0xE2) : 0x1E008404
MSR_PMG_IO_CAPTURE_BASE....(0xE4) : 0x20414
IA32_MPERF.................(0xE7) : 0x38DC1F8BBF
IA32_APERF.................(0xE8) : 0x3C4F44EFF8
MSR_FLEX_RATIO.............(0x194) : 0x180000
MSR_IA32_PERF_STATUS.......(0x198) : 0x1F1000001D00
MSR_IA32_PERF_CONTROL......(0x199) : 0x2200
IA32_CLOCK_MODULATION......(0x19A) : 0x8
IA32_THERM_STATUS..........(0x19C) : 0x88220000
IA32_MISC_ENABLES..........(0x1A0) : 0x4000850089
MSR_MISC_PWR_MGMT..........(0x1AA) : 0x400001
MSR_TURBO_RATIO_LIMIT......(0x1AD) : 0x22222224
IA32_ENERGY_PERF_BIAS......(0x1B0) : 0x4
MSR_POWER_CTL..............(0x1FC) : 0x14005F
MSR_RAPL_POWER_UNIT........(0x606) : 0xA1003
MSR_PKG_POWER_LIMIT........(0x610) : 0x8000816000DC8118
MSR_PKG_ENERGY_STATUS......(0x611) : 0x85A1EF9
MSR_PKG_POWER_INFO.........(0x614) : 0xC00118
MSR_PP0_CURRENT_CONFIG.....(0x601) : 0x1814149480000380
MSR_PP0_POWER_LIMIT........(0x638) : 0x0
MSR_PP0_ENERGY_STATUS......(0x639) : 0x6D5DE58
MSR_PP0_POLICY.............(0x63a) : 0x0
MSR_PP1_CURRENT_CONFIG.....(0x602) : 0x1814149480000190
MSR_PP1_POWER_LIMIT........(0x640) : 0x0
MSR_PP1_ENERGY_STATUS......(0x641) : 0xE254E
MSR_PP1_POLICY.............(0x642) : 0x10
MSR_CONFIG_TDP_NOMINAL.....(0x648) : 0x1D
MSR_CONFIG_TDP_LEVEL1......(0x649) : 0xC0000000000000
MSR_CONFIG_TDP_LEVEL2......(0x64a) : 0xC0000000000000
MSR_CONFIG_TDP_CONTROL.....(0x64b) : 0x80000000
MSR_TURBO_ACTIVATION_RATIO.(0x64c) : 0x0
MSR_PKGC3_IRTL.............(0x60a) : 0x883B
MSR_PKGC6_IRTL.............(0x60b) : 0x8850
MSR_PKGC7_IRTL.............(0x60c) : 0x8857
MSR_PKG_C2_RESIDENCY.......(0x60d) : 0x0
MSR_PKG_C3_RESIDENCY.......(0x3f8) : 0x0
MSR_PKG_C6_RESIDENCY.......(0x3f9) : 0x0
MSR_PKG_C7_RESIDENCY.......(0x3fa) : 0x0
IA32_TSC_DEADLINE..........(0x6E0) : 0x65632A77D4
PCH device.................: 0x1E578086
Intel Register Data
------------------------------------
CPU_VGACNTRL...............: 0x8004298E
IS_GEN5(devid) || IS_GEN6(devid) || IS_IVYBRIDGE(devid)
PGETBL_CTL.................: 0x00000000
INSTDONE_I965..............: 0x00000000
INSTDONE_1.................: 0x00000000
CPU_VGACNTRL...............: 0x8004298e (disabled)
DIGITAL_PORT_HOTPLUG_CNTRL.: 0x00000000
RR_HW_CTL..................: 0x00000000 (low 0, high 0)
FDI_PLL_BIOS_0.............: 0x00000000
FDI_PLL_BIOS_1.............: 0x00000000
FDI_PLL_BIOS_2.............: 0x00000000
DISPLAY_PORT_PLL_BIOS_0....: 0x00000000
DISPLAY_PORT_PLL_BIOS_1....: 0x00000000
DISPLAY_PORT_PLL_BIOS_2....: 0x00000000
FDI_PLL_FREQ_CTL...........: 0x00000000
PIPEACONF..................: 0xd9000054 (enabled, active, pf-pd, rotate 0, 6bpc)
HTOTAL_A...................: 0x06190555 (1366 active, 1562 total)
HBLANK_A...................: 0x06190555 (1366 start, 1562 end)
HSYNC_A....................: 0x05a50585 (1414 start, 1446 end)
VTOTAL_A...................: 0x031f02ff (768 active, 800 total)
VBLANK_A...................: 0x031f02ff (768 start, 800 end)
VSYNC_A....................: 0x03080302 (771 start, 777 end)
VSYNCSHIFT_A...............: 0x00000000
PIPEASRC...................: 0x055502ff (1366, 768)
PIPEA_DATA_M1..............: 0x7e4fdf3b (TU 64, val 0x4fdf3b 5234491)
PIPEA_DATA_N1..............: 0x00800000 (val 0x800000 8388608)
PIPEA_DATA_M2..............: 0x00000000 (TU 1, val 0x0 0)
PIPEA_DATA_N2..............: 0x00000000 (val 0x0 0)
PIPEA_LINK_M1..............: 0x0002374b (val 0x2374b 145227)
PIPEA_LINK_N1..............: 0x00080000 (val 0x80000 524288)
PIPEA_LINK_M2..............: 0x00000000 (val 0x0 0)
PIPEA_LINK_N2..............: 0x00000000 (val 0x0 0)
DSPACNTR...................: 0xd8004400 (enabled)
DSPABASE...................: 0x00000000
DSPASTRIDE.................: 0x00001600 (88)
DSPASURF...................: 0x10a53000
DSPATILEOFF................: 0x00000000 (0, 0)
PIPEBCONF..................: 0x00000000 (disabled, inactive, pf-pd, rotate 0, 8bpc)
HTOTAL_B...................: 0x00000000 (1 active, 1 total)
HBLANK_B...................: 0x00000000 (1 start, 1 end)
HSYNC_B....................: 0x00000000 (1 start, 1 end)
VTOTAL_B...................: 0x00000000 (1 active, 1 total)
VBLANK_B...................: 0x00000000 (1 start, 1 end)
VSYNC_B....................: 0x00000000 (1 start, 1 end)
VSYNCSHIFT_B...............: 0x00000000
PIPEBSRC...................: 0x00000000 (1, 1)
PIPEB_DATA_M1..............: 0x00000000 (TU 1, val 0x0 0)
PIPEB_DATA_N1..............: 0x00000000 (val 0x0 0)
PIPEB_DATA_M2..............: 0x00000000 (TU 1, val 0x0 0)
PIPEB_DATA_N2..............: 0x00000000 (val 0x0 0)
PIPEB_LINK_M1..............: 0x00000000 (val 0x0 0)
PIPEB_LINK_N1..............: 0x00000000 (val 0x0 0)
PIPEB_LINK_M2..............: 0x00000000 (val 0x0 0)
PIPEB_LINK_N2..............: 0x00000000 (val 0x0 0)
DSPBCNTR...................: 0x00000000 (disabled)
DSPBBASE...................: 0x00000000
DSPBSTRIDE.................: 0x00000000 (0)
DSPBSURF...................: 0x00000000
DSPBTILEOFF................: 0x00000000 (0, 0)
PIPECCONF..................: 0x00000000 (disabled, inactive, pf-pd, rotate 0, 8bpc)
HTOTAL_C...................: 0x00000000 (1 active, 1 total)
HBLANK_C...................: 0x00000000 (1 start, 1 end)
HSYNC_C....................: 0x00000000 (1 start, 1 end)
VTOTAL_C...................: 0x00000000 (1 active, 1 total)
VBLANK_C...................: 0x00000000 (1 start, 1 end)
VSYNC_C....................: 0x00000000 (1 start, 1 end)
VSYNCSHIFT_C...............: 0x00000000
PIPECSRC...................: 0x00000000 (1, 1)
PIPEC_DATA_M1..............: 0x00000000 (TU 1, val 0x0 0)
PIPEC_DATA_N1..............: 0x00000000 (val 0x0 0)
PIPEC_DATA_M2..............: 0x00000000 (TU 1, val 0x0 0)
PIPEC_DATA_N2..............: 0x00000000 (val 0x0 0)
PIPEC_LINK_M1..............: 0x00000000 (val 0x0 0)
PIPEC_LINK_N1..............: 0x00000000 (val 0x0 0)
PIPEC_LINK_M2..............: 0x00000000 (val 0x0 0)
PIPEC_LINK_N2..............: 0x00000000 (val 0x0 0)
DSPCCNTR...................: 0x00000000 (disabled)
DSPCBASE...................: 0x00000000
DSPCSTRIDE.................: 0x00000000 (0)
DSPCSURF...................: 0x00000000
DSPCTILEOFF................: 0x00000000 (0, 0)
PFA_CTL_1..................: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
PFA_CTL_2..................: 0x00007e80 (vscale f)
PFA_CTL_3..................: 0x00003f40 (vscale initial phase f)
PFA_CTL_4..................: 0x00007d54 (hscale f)
PFA_WIN_POS................: 0x00000000 (0, 0)
PFA_WIN_SIZE...............: 0x00000000 (0, 0)
PFB_CTL_1..................: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
PFB_CTL_2..................: 0x00007e80 (vscale f)
PFB_CTL_3..................: 0x00003f40 (vscale initial phase f)
PFB_CTL_4..................: 0x00007d54 (hscale f)
PFB_WIN_POS................: 0x00000000 (0, 0)
PFB_WIN_SIZE...............: 0x00000000 (0, 0)
PFC_CTL_1..................: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
PFC_CTL_2..................: 0x00007e80 (vscale f)
PFC_CTL_3..................: 0x00003f40 (vscale initial phase f)
PFC_CTL_4..................: 0x00007d54 (hscale f)
PFC_WIN_POS................: 0x00000000 (0, 0)
PFC_WIN_SIZE...............: 0x00000000 (0, 0)
PCH_DREF_CONTROL...........: 0x00001402 (cpu source disable, ssc_source enable, nonspread_source enable, superspread_source disable, ssc4_mode downspread, ssc1 enable, ssc4 disable)
PCH_RAWCLK_FREQ............: 0x0000007d (FDL_TP1 timer 0.5us, FDL_TP2 timer 1.5us, freq 125)
PCH_DPLL_TMR_CFG...........: 0x0271186a
PCH_SSC4_PARMS.............: 0x01204860
PCH_SSC4_AUX_PARMS.........: 0x000029c5
PCH_DPLL_SEL...............: 0x00000008 (TransA DPLL enable (DPLL A), TransB DPLL disable (DPLL ))
PCH_DPLL_ANALOG_CTL........: 0x00008000
PCH_DPLL_A.................: 0x88026002 (enable, sdvo high speed no, mode LVDS, p2 Div 14, FPA0 P1 2, FPA1 P1 2, refclk SSC, sdvo/hdmi mul 1)
PCH_DPLL_B.................: 0x04800080 (disable, sdvo high speed no, mode , p2 , FPA0 P1 8, FPA1 P1 8, refclk default 120Mhz, sdvo/hdmi mul 1)
PCH_FPA0...................: 0x00c41108 (n = 4, m1 = 17, m2 = 8)
PCH_FPA1...................: 0x00c41108 (n = 4, m1 = 17, m2 = 8)
PCH_FPB0...................: 0x00030d07 (n = 3, m1 = 13, m2 = 7)
PCH_FPB1...................: 0x00030d07 (n = 3, m1 = 13, m2 = 7)
TRANS_HTOTAL_A.............: 0x06190555 (1366 active, 1562 total)
TRANS_HBLANK_A.............: 0x06190555 (1366 start, 1562 end)
TRANS_HSYNC_A..............: 0x05a50585 (1414 start, 1446 end)
TRANS_VTOTAL_A.............: 0x031f02ff (768 active, 800 total)
TRANS_VBLANK_A.............: 0x031f02ff (768 start, 800 end)
TRANS_VSYNC_A..............: 0x03080302 (771 start, 777 end)
TRANS_VSYNCSHIFT_A.........: 0x00000000
TRANSA_DATA_M1.............: 0x00000000 (TU 1, val 0x0 0)
TRANSA_DATA_N1.............: 0x00000000 (val 0x0 0)
TRANSA_DATA_M2.............: 0x00000000 (TU 1, val 0x0 0)
TRANSA_DATA_N2.............: 0x00000000 (val 0x0 0)
TRANSA_DP_LINK_M1..........: 0x00000000 (val 0x0 0)
TRANSA_DP_LINK_N1..........: 0x00000000 (val 0x0 0)
TRANSA_DP_LINK_M2..........: 0x00000000 (val 0x0 0)
TRANSA_DP_LINK_N2..........: 0x00000000 (val 0x0 0)
TRANS_HTOTAL_B.............: 0x00000000 (1 active, 1 total)
TRANS_HBLANK_B.............: 0x00000000 (1 start, 1 end)
TRANS_HSYNC_B..............: 0x00000000 (1 start, 1 end)
TRANS_VTOTAL_B.............: 0x00000000 (1 active, 1 total)
TRANS_VBLANK_B.............: 0x00000000 (1 start, 1 end)
TRANS_VSYNC_B..............: 0x00000000 (1 start, 1 end)
TRANS_VSYNCSHIFT_B.........: 0x00000000
TRANSB_DATA_M1.............: 0x00000000 (TU 1, val 0x0 0)
TRANSB_DATA_N1.............: 0x00000000 (val 0x0 0)
TRANSB_DATA_M2.............: 0x00000000 (TU 1, val 0x0 0)
TRANSB_DATA_N2.............: 0x00000000 (val 0x0 0)
TRANSB_DP_LINK_M1..........: 0x00000000 (val 0x0 0)
TRANSB_DP_LINK_N1..........: 0x00000000 (val 0x0 0)
TRANSB_DP_LINK_M2..........: 0x00000000 (val 0x0 0)
TRANSB_DP_LINK_N2..........: 0x00000000 (val 0x0 0)
TRANS_HTOTAL_C.............: 0x00000000 (1 active, 1 total)
TRANS_HBLANK_C.............: 0x00000000 (1 start, 1 end)
TRANS_HSYNC_C..............: 0x00000000 (1 start, 1 end)
TRANS_VTOTAL_C.............: 0x00000000 (1 active, 1 total)
TRANS_VBLANK_C.............: 0x00000000 (1 start, 1 end)
TRANS_VSYNC_C..............: 0x00000000 (1 start, 1 end)
TRANS_VSYNCSHIFT_C.........: 0x00000000
TRANSC_DATA_M1.............: 0x00000000 (TU 1, val 0x0 0)
TRANSC_DATA_N1.............: 0x00000000 (val 0x0 0)
TRANSC_DATA_M2.............: 0x00000000 (TU 1, val 0x0 0)
TRANSC_DATA_N2.............: 0x00000000 (val 0x0 0)
TRANSC_DP_LINK_M1..........: 0x00000000 (val 0x0 0)
TRANSC_DP_LINK_N1..........: 0x00000000 (val 0x0 0)
TRANSC_DP_LINK_M2..........: 0x00000000 (val 0x0 0)
TRANSC_DP_LINK_N2..........: 0x00000000 (val 0x0 0)
TRANSACONF.................: 0xc0000000 (enable, active, progressive)
TRANSBCONF.................: 0x00000000 (disable, inactive, progressive)
TRANSCCONF.................: 0x00000000 (disable, inactive, progressive)
FDI_TXA_CTL................: 0x80044f02 (enable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis 0dB, port width X1, enhanced framing enable, FDI PLL enable, scrambing enable, master mode disable)
FDI_TXB_CTL................: 0x00040000 (disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis 0dB, port width X1, enhanced framing enable, FDI PLL disable, scrambing enable, master mode disable)
FDI_TXC_CTL................: 0x00040000 (disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis 0dB, port width X1, enhanced framing enable, FDI PLL disable, scrambing enable, master mode disable)
FDI_RXA_CTL................: 0x80022f50 (enable, train pattern not train, port width X1, 6bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL enable,FS ecc enable, FE ecc enable, FS err report enable, FE err report enable,scrambing enable, eFDI_RXB_CTL................: 0x00000040 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enaFDI_RXC_CTL................: 0x00000040 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enaDPAFE_BMFUNC...............: 0x0001d233
DPAFE_DL_IREFCAL0..........: 0x00d22bdc
DPAFE_DL_IREFCAL1..........: 0x00d22bdc
DPAFE_DP_IREFCAL...........: 0x80d2218c
PCH_DSPCLK_GATE_D..........: 0x100002a0
PCH_DSP_CHICKEN1...........: 0x00400000
PCH_DSP_CHICKEN2...........: 0x00001000
PCH_DSP_CHICKEN3...........: 0x00000024
FDI_RXA_MISC...............: 0x00200080 (FDI Delay 128)
FDI_RXB_MISC...............: 0x00200090 (FDI Delay 144)
FDI_RXC_MISC...............: 0x00200090 (FDI Delay 144)
FDI_RXA_TUSIZE1............: 0x7e000000
FDI_RXA_TUSIZE2............: 0x7e000000
FDI_RXB_TUSIZE1............: 0x7e000000
FDI_RXB_TUSIZE2............: 0x7e000000
FDI_RXC_TUSIZE1............: 0x7e000000
FDI_RXC_TUSIZE2............: 0x7e000000
FDI_PLL_CTL_1..............: 0x7e000000
FDI_PLL_CTL_2..............: 0x7e000000
FDI_RXA_IIR................: 0x00000700
FDI_RXA_IMR................: 0x00000000
FDI_RXB_IIR................: 0x00000000
FDI_RXB_IMR................: 0x000008ff
PCH_ADPA...................: 0x00040000 (disabled, transcoder A, -hsync, -vsync)
HDMIB......................: 0x0000081c (disabled pipe A 8bpc TMDS DVI audio disabled +vsync +hsync detected)
HDMIC......................: 0x00000018 (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync non-detected)
HDMID......................: 0x0000001c (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync detected)
PCH_LVDS...................: 0x80300302 (enabled, pipe A, 18 bit, 1 channel)
CPU_eDP_A..................: 0x00000018
PCH_DP_B...................: 0x00000004
PCH_DP_C...................: 0x00000000
PCH_DP_D...................: 0x00000004
TRANS_DP_CTL_A.............: 0x60000018 (disable port none 8bpc +vsync +hsync)
TRANS_DP_CTL_B.............: 0x60000018 (disable port none 8bpc +vsync +hsync)
TRANS_DP_CTL_C.............: 0x60000018 (disable port none 8bpc +vsync +hsync)
BLC_PWM_CPU_CTL2...........: 0x80000000 (enable 1, pipe A)
BLC_PWM_CPU_CTL............: 0x00000468 (cycle 1128)
BLC_PWM_PCH_CTL1...........: 0x80000000 (enable 1, override 0, inverted polarity 0)
BLC_PWM_PCH_CTL2...........: 0x07100000 (freq 1808, cycle 0)
PCH_PP_STATUS..............: 0xc0000008 (on, ready, sequencing idle)
PCH_PP_CONTROL.............: 0xabcd0003 (blacklight disabled, power down on reset, panel on)
PCH_PP_ON_DELAYS...........: 0x000a07d0
PCH_PP_OFF_DELAYS..........: 0x000a07d0
PCH_PP_DIVISOR.............: 0x00186904
PORT_DBG...................: 0x0000f00f (HW DRRS off)
RC6_RESIDENCY_TIME.........: 0x00000000
RC6p_RESIDENCY_TIME........: 0x05ecd567
RC6pp_RESIDENCY_TIME.......: 0x00000000
IS_GEN6(devid) || IS_GEN7(devid)
FENCE START 0..............: 0x00000001
FENCE END 0................: 0x00fff02b
FENCE START 1..............: 0x00000000
FENCE END 1................: 0x00000000
FENCE START 2..............: 0x00000000
FENCE END 2................: 0x00000000
FENCE START 3..............: 0x00000000
FENCE END 3................: 0x00000000
FENCE START 4..............: 0x00000000
FENCE END 4................: 0x00000000
FENCE START 5..............: 0x00000000
FENCE END 5................: 0x00000000
FENCE START 6..............: 0x00000000
FENCE END 6................: 0x00000000
FENCE START 7..............: 0x00000000
FENCE END 7................: 0x00000000
FENCE START 8..............: 0x00000000
FENCE END 8................: 0x00000000
FENCE START 9..............: 0x00000000
FENCE END 9................: 0x00000000
FENCE START 10.............: 0x00000000
FENCE END 10...............: 0x00000000
FENCE START 11.............: 0x00000000
FENCE END 11...............: 0x00000000
FENCE START 12.............: 0x00000000
FENCE END 12...............: 0x00000000
FENCE START 13.............: 0x00000000
FENCE END 13...............: 0x00000000
FENCE START 14.............: 0x00000000
FENCE END 14...............: 0x00000000
FENCE START 15.............: 0x00000000
FENCE END 15...............: 0x00000000
FENCE START 16.............: 0x00000000
FENCE END 16...............: 0x00000000
FENCE START 17.............: 0x00000000
FENCE END 17...............: 0x00000000
FENCE START 18.............: 0x00000000
FENCE END 18...............: 0x00000000
FENCE START 19.............: 0x00000000
FENCE END 19...............: 0x00000000
FENCE START 20.............: 0x00000000
FENCE END 20...............: 0x00000000
FENCE START 20.............: 0x00000000
FENCE END 20...............: 0x00000000
FENCE START 21.............: 0x00000000
FENCE END 21...............: 0x00000000
FENCE START 22.............: 0x00000000
FENCE END 22...............: 0x00000000
FENCE START 23.............: 0x00000000
FENCE END 23...............: 0x00000000
FENCE START 24.............: 0x00000000
FENCE END 24...............: 0x00000000
FENCE START 25.............: 0x00000000
FENCE END 25...............: 0x00000000
FENCE START 26.............: 0x00000000
FENCE END 26...............: 0x00000000
FENCE START 27.............: 0x00000000
FENCE END 27...............: 0x00000000
FENCE START 28.............: 0x00000000
FENCE END 28...............: 0x00000000
FENCE START 29.............: 0x00000000
FENCE END 29...............: 0x00000000
FENCE START 30.............: 0x00000000
FENCE END 30...............: 0x00000000
FENCE START 31.............: 0x00000000
FENCE END 31...............: 0x00000000
GEN6_RP_CONTROL............: 0x00000000 (disabled)
GEN6_RPNSWREQ..............: 0x00000000
GEN6_RP_DOWN_TIMEOUT.......: 0x00000000
GEN6_RP_INTERRUPT_LIMITS...: 0x00000000
GEN6_RP_UP_THRESHOLD.......: 0x00000000
GEN6_RP_UP_EI..............: 0x00000000
GEN6_RP_DOWN_EI............: 0x00000000
GEN6_RP_IDLE_HYSTERSIS.....: 0x00000000
GEN6_RC_STATE..............: 0x00000000
GEN6_RC_CONTROL............: 0x00000000
GEN6_RC1_WAKE_RATE_LIMIT...: 0x00000000
GEN6_RC6_WAKE_RATE_LIMIT...: 0x00000000
GEN6_RC_EVALUATION_INTERVAL: 0x00000000
GEN6_RC_IDLE_HYSTERSIS.....: 0x00000000
GEN6_RC_SLEEP..............: 0x00000000
GEN6_RC1e_THRESHOLD........: 0x00000000
GEN6_RC6_THRESHOLD.........: 0x00000000
GEN6_RC_VIDEO_FREQ.........: 0x00000000
GEN6_PMIER.................: 0x00000030
GEN6_PMIMR.................: 0x00000000
GEN6_PMINTRMSK.............: 0x00000000
CPU Ratio Info:
------------------------------------
CPU Low Frequency Mode.............: 1200 MHz
CPU Maximum non-Turbo Frequency....: 2900 MHz
CPU Maximum Frequency..............: 2900 MHz
IGPU Info:
------------------------------------
IGPU Current Frequency.............: 350 MHz
IGPU Minimum Frequency.............: 350 MHz
IGPU Maximum Non-Turbo Frequency...: 650 MHz
IGPU Maximum Turbo Frequency.......: 1250 MHz
IGPU Maximum limit.................: No Limit
CPU P-States [ (29) ] iGPU P-States [ (7) ]
CPU C3-Cores [ 0 1 2 3 ]
CPU C6-Cores [ 2 3 ]
CPU C7-Cores [ 0 1 2 ]
CPU C7-Cores [ 0 1 2 3 ]
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